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3928 Centraloma Drive, San Diego, CA 92107 • 619.255.3422

 

Space

  • Space Edge Processor – Schematic design of a motherboard with a CPU/GPU and two Versals (Ethernet Switch and Coprocessor). FPGA design for hardware testing.  FPGA design for support of CPU/GPU. FPGA design of a Layer 2 Ethernet Switch.
 
  • Space Regenerative Processor – System design contributor (backplane-balsed system with six unique plug in boards).  Schematic design of dual Ultrascale+ (Zynq and Virtex) board.  FPGA design for hardware testing. FPGA design for switch logic.  (System included one of hte optical modems referenced in the next bullet).
 
  • Free Space Optical Modems – Schematic design of three Ultrascale+ / Modem ASIC boards.  Oversaw subsequent schematic design of a Versal / Modem ASIC board.  FPGA design or hardware testing on all four boards.  FPGA design for control of Modem ASIC, lasers, CDM, uICR, and TECs.
 
  • Spaceflight Integrated Vehicle Fluids – FPGA design of a redundant communication system spread across a network of SmartFusion2 devices.  FPGA design for hardware testing.

 

  • Satellite Camera – Mentored a junior engineer through the schematic design of a camera board with 4K imager and Ultrascale FPGA.  FPGA design of housekeeping logic on the camera board.  FPGA design of image-rendering logic for testing.

 

  • FOC Motor Control on Telecommunications Satellite – Schematic design of two DSP / ProASIC3 co-processing boards.  FPGA design for hardware testing.  FPGA design for FOC motor control.

 

Electronic Design Automation (EDA)

  • ASIC Emulator - Schematic design of an ATCA Card with six Arria-10 devices and a Cyclone-V to be used in a fourteen slot chassis for ASIC emulation.  FPGA design for hardware testing.  FPGA design Cyclone-V control of Arria-10 devices.

 

  • Hardware Accelerated Simulator - Schematic design of a Stratix-V and Cyclone-V SOC PCIe Card for hardware accelerated RTL simulation.  FPGA design for hardware testing.  FPGA design for traffic management in Cyclone-V SOC.
 

 

 

Medical

  • Fluoroscopy System - FPGA design of an image processing system in a Virtex-5 for a live fluoroscopy system.

 

  • Flow Cytometer - FPGA design of a DSP system in a Spartan-6 for the capture and pre-processing of sample data for a flow cytometer. 

 

  • All-in-One Video Router - Schematic design of an 18x18 DVI-D Crosspoint Backplane.  Schematic design of a DVI-D Receive Card, DVI-I Receive Card, HD-SDI & Analog Video Receive Card, DVI-I Transmit Card, HD-SDI Transmit Card, Analog Video Transmit Card, and H.264 Cards to use with the backplane.  FPGA design of control systems and video processing systems in Spartan-3 devices.

 

  • Universal Source Video Converter and Processor - Schematic design of an Arria-II board to accept DVI-I, 3G-SDI, S-Video, and Composite Video and convert to a DVI-D output.  FPGA design of control and video processing system for scaling, frame rate conversion, and overlay.

 

  • HDBaseT Video Extender - Schematic design of two cards used together to extend HDMI, Audio, 10/100 Ethernet, USB, and RS-232 over an HDBaseT link (copper and fiber).
 

 

 

Military

  • Quantum Cascade Laser based IR Spectrometer - FPGA design of a control system in a Spartan-6 for wavelength tuning, firing, and cooling of the laser source.  FPGA design of a control and pre-processing system in a Spartan-6 for the detector.

 

  • Aircraft Defense System - FPGA design of a control system in a Spartan-6 for laser firing, laser cooling, and servo control of a brushless motor for a missile jammer in an aircraft.
 

 

 

Commercial/Industrial

  • Light-field Camera - FPGA design of an image processing system in a Kinex-7 for a Light-field camera with ten 1.3 Megapixel CMOS Imagers.

 

  • X-ray Baggage Scanner - Schematic design of a Spartan-6 board used in the X-ray generation electronics of an X-ray baggage scanner.  FPGA design of the control system.

 

 

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Last update:  06/26/23